Astranis is connecting the four billion people in the world who do not currently have access to the internet. We are building the next generation of smaller, lower-cost spacecraft to bring the world online. We are well-funded by some of the best investors in the business and have raised over $350 million to date. We have a world-class team that is passionate about building amazing technology. And we have a fun and collaborative work environment where you will learn a lot and make a huge impact no matter where you are in your career. Just check out our Glassdoor reviews to see what our team has to say about working at Astranis. Our team is growing fast. Apply now! As an RTL verification engineer at Astranis, you will be responsible for developing and maintaining the FPGA simulation and verification infrastructure at Astranis, develop BFM and test benches. Also you’ll be involved in the drafting of test plans, tracking bugs, and supporting RTL design engineers in troubleshooting design problems. You'll support the rest of the FPGA team in testing the design, collecting coverage reports, and you'll help improve and maintain our FPGA image release process.